1. Field of the Invention
This invention relates to a semiconductor memory device used for image processing, for example, and more particularly to a memory device of the type in which high speed access to a memory array is possible in the row and column directions.
2. Description of the Related Art
With the increase in memory capacity of semiconductor memory devices, their range of application has expanded into the field of image processing. Particularly in the dynamic image memory applied for the image processings, various types of high speed operation modes have been used in order to obtain a high speed access to the memory cell array. These modes are, for example, nibble mode, high speed page mode, and static column mode. An exemplar prior image memory will be described with reference to FIG. 1. Memory cell MC is made of MOS transistor Q and capacitor C, as shown in FIG. 1. Memory cells thus arranged are arrayed in a matrix fashion to form a cell array. The memory cells MC arrayed on a row in the memory matrix are connected to a single word line WL. Memory cells MC on a column are connected to a single bit line BL.
In a high speed mode used in the image memory of prior art, the memory cells of the memory cell array are accessed at a high speed in the row direction. Specifically, in this mode, one word line is first selected, and the data of the memory cells MC coupled with the selected word line are sequentially accessed.
When using the high speed access mode, it is impossible to access at a high speed the memory cells coupled with different word lines, since the different word lines must be selected line by line. Therefore, a long time is needed until all of the memory cells of the different word lines have been accessed.
In the image processing system using the image memory, there frequently occurs a situation that the image data must be scanned at a high speed in the vertical direction on the display screen, as shown in FIG. 2. This situation occurs particularly when a graphic display is performed. Normally, the pixel data in the row and column directions on the display are stored in the image memory in a corresponding layout. At the present stage of this technology where the high speed access to the image memory in the column direction is impossible, it is impossible to vertically display an image on the display at high speed.